Exams › GATE › Technical
Select the correct statement(s) regarding CMOS implementation of NOT gates.
- Noise Margin High (NMH) is always equal to the Noise Margin Low (NML), irrespective of the sizing of transistors.
- Dynamic power consumption during switching is zero.
- For a logical high input under steady state, the nMOSFET is in the linear regime of operation.
- Mobility of electrons never influences the switching speed of the NOT gate.
Correct answer: For a logical high input under steady state, the nMOSFET is in the linear regime of operation.
Solution
In a CMOS NOT gate, when a logical high input is applied, the nMOS transistor is turned on and operates in the linear region to effectively pull the output low, which is essential for the correct functioning of the gate.
Related GATE Technical questions
- Select the Boolean function(s) equivalent to x + yz, where x, y, and z are Boolean variables, and + denotes logical OR operation.
- For the circuit shown, the clock frequency is f0 and the duty cycle is 25%. For the signal at the Q output of the Flip-Flop, _______.
- The three-dimensional state of stress at a point is given by σ = [[10, 0, 0],[0, 40, 0],[0, 0, 0]] MPa. The maximum shear stress at the point is
- A 2 m wide strip footing is founded at a depth of 1.5 m below the ground level in a homogeneous pure clay bed. The clay bed has unit cohesion of 40 kPa. Due to seasonal fluctuations of water table from peak summer to peak monsoon period, the net ultimate bearing capacity of the footing, as per Terzaghi’s theory, will
- Consider the statements P and Q.
P: Soil particles formed by mechanical weathering, and close to their origin are generally subrounded.
Q: A activity of the clay physically signifies its swell potential.
Which one of the following options is CORRECT?
- The number of degrees of freedom for a natural open channel flow with a mobile bed is
⚔️ Practice GATE Technical free + battle 1v1 →