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ExamsGATETechnical

Statement for Linked Answer Questions 54 and 55: A computer uses 46-bit virtual address, 32-bit physical address, and a three-level paged page table organization. The page table base register stores the base address of the first-level table (T1), which occupies exactly one page. Each entry of T1 stores the base address of a page of the second-level table (T2). Each entry of T2 stores the base address of a page of the third-level table (T3). Each entry of T3 stores a page table entry (PTE). The PTE is 32 bits in size. The processor used in the computer has a 1 MB 16-way set associative virtually indexed physically tagged cache. The cache block size is 64 bytes. Q.54 What is the size of a page in KB in this computer?

  1. 2
  2. 4
  3. 8
  4. 16

Correct answer: 8

Solution

With page size 2^p bytes and 4-byte (32-bit) entries, each table page holds 2^(p-2) entries, giving (p-2) index bits per level. The 46-bit virtual address splits as 46 = p + 3*(p-2) => 4p-6=46 => p=13, so page size = 2^13 = 8 KB (option C), not the stored 4 KB.

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