Consider a computer with a 4 MHz processor. Its DMA controller can transfer 8 bytes in 1 cycle from a device to main memory through cycle stealing at regular intervals. What is the data transfer rate (in bits per second) of the DMA controller if 1% of the processor cycles are used for DMA?

2,56,000
3,200
25,60,000
32,000

Correct answer: 25,60,000

Solution

The DMA controller transfers 8 bytes per cycle, and with a 4 MHz processor, it has 4 million cycles per second. Since only 1% of the cycles are used for DMA, the effective cycles for data transfer are 40,000 per second. Thus, the total data transferred per second is 40,000 cycles multiplied by 8 bytes, which equals 320,000 bytes or 2,560,000 bits.

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