GATE Technical: EC-1 questions with solutions

Q1. Consider the two-port resistive network shown in the figure. When an excitation of 5 V is applied across Port 1, and Port 2 is shorted, the current through the short circuit at Port 2 is measured to be 1 A (see (a) in the figure). Now, if an excitation of 5 V is applied across Port 2, and Port 1 is shorted (see (b) in the figure), what is the current through the short circuit at Port 1?

1. 0.5 A
2. 1 A
3. 2 A
4. 2.5 A

Answer: 1 A

The current through Port 1 when it is shorted is the same as the current through Port 2 when it is shorted, due to the symmetry of the resistive network and the equal voltage applied across both ports. Since the current through Port 2 was measured to be 1 A under the same conditions, the current through Port 1 must also be 1 A.

Q2. Let Y(s) be the unit-step response of a causal system having a transfer function G(s) = (3 - s)/((s + 1)(s + 3)) that is, Y(s) = G(s)/s. The forced response of the system is

1. u(t) - 2e^(-t)u(t) + e^(-3t)u(t)
2. 2u(t) - 2e^(-t)u(t) + e^(-3t)u(t)
3. 2u(t)
4. u(t)

Answer: u(t)

The forced (steady-state) response comes from the input pole at s=0, with coefficient G(0) = (3-0)/((0+1)(0+3)) = 3/3 = 1. So the forced response is 1*u(t) = u(t), not 2u(t).

Q3. What is the electric flux (∫ E · d a) through a quarter-cylinder of height H (as shown in the figure) due to an infinitely long line charge along the axis of the cylinder with a charge density of Q ?

1. HQ/ε0
2. HQ/4ε0
3. Hε0/4Q
4. 4H/Qε0

Answer: HQ/4ε0

The electric flux through the quarter-cylinder is determined by the symmetry of the electric field produced by the infinitely long line charge, which leads to a quarter of the total flux that would pass through a full cylinder. Thus, the correct expression for the flux is a quarter of the total flux, resulting in HQ/4ε0.

Q4. In the table shown, List I and List II, respectively, contain terms appearing on the left-hand side and the right-hand side of Maxwell's equations (in their standard form). Match the left-hand side with the corresponding right-hand side. List I: 1. ∇ · D 2. ∇ × E 3. ∇ · B 4. ∇ × H List II: P. 0 Q. ρ R. −∂B/∂t S. J + ∂D/∂t

1. 1 - P, 2 - R, 3 - Q, 4 - S
2. 1 - Q, 2 - R, 3 - P, 4 - S
3. 1 - Q, 2 - S, 3 - P, 4 - R
4. 1 - R, 2 - Q, 3 - S, 4 - P

Answer: 1 - Q, 2 - R, 3 - P, 4 - S

The correct option matches the divergence of the electric displacement field (∇ · D) to charge density (ρ), the curl of the electric field (∇ × E) to the negative rate of change of the magnetic field (−∂B/∂t), the divergence of the magnetic field (∇ · B) to zero, and the curl of the magnetic field (∇ × H) to the sum of current density (J) and the rate of change of the electric displacement field (∂D/∂t), which aligns with Maxwell's equations.

Q5. A standard CMOS inverter is designed with equal rise and fall times (βn = βp). If the width of the pMOS transistor in the inverter is increased, what would be the effect on the LOW noise margin (NML) and the HIGH noise margin NMH?

1. NML increases and NMH decreases.
2. NML decreases and NMH increases.
3. Both NML and NMH increase.
4. No change in the noise margins.

Answer: NML increases and NMH decreases.

Increasing the width of the pMOS transistor enhances its drive strength, which improves the ability to pull the output low, thus increasing the LOW noise margin (NML). However, this change can lead to a slower pull-up time compared to the pull-down time, resulting in a decrease in the HIGH noise margin (NMH).

Q6. In the circuit shown, what are the values of F for EN = 0 and EN = 1, respectively?

1. 0 and D
2. Hi-Z and D
3. 0 and 1
4. Hi-Z and D̄

Answer: Hi-Z and D

When EN = 0, the output F is in a high-impedance state (Hi-Z) because the enable signal is off, preventing any output. When EN = 1, the output F directly follows the input D, resulting in F being equal to D.

Q7. In the circuit shown, if v(t) = 2 sin(1000 t) volts, R = 1 kΩ and C = 1 μF, then the steady-state current i(t), in milliamperes (mA), is

1. sin(1000 t) + cos(1000 t)
2. 2 sin(1000 t) + 2 cos(1000 t)
3. 3 sin(1000 t) + cos(1000 t)
4. sin(1000 t) + 3 cos(1000 t)

Answer: sin(1000 t) + cos(1000 t)

The correct option represents the steady-state current in the circuit, which is derived from the voltage across the capacitor and the resistor. The current through the capacitor leads the voltage by 90 degrees, resulting in a sine and cosine combination that reflects the phase shift and the impedance of the circuit.